Cisco PVDM2-32 Packet DSP Module

Components

DSP

• Texas Instruments TNETV2510GGW for PVDM2-16, PVDM2-32, PVDM2-48, and PVDM2-64

• Texas Instruments TNETV2505GGW for PVDM2-8

DSP CPU Clock

• 200 MHz for TNETV2510GGW

• 175MHz for TNETV2505GGW

DSP External Memory

128-megabit synchronous dynamic RAM for each DSP (for both TI 2510 and TI 2505)

Interface

80-pin SIMM interface

Features

Echo Cancellation

Software echo cancellation compliant with ITU-I G.168, with 64-ms tail coverage

Approvals and Compliance

Safety

• IEC 60950 (worldwide) and AS/NZS 3260 (Australia and New Zealand)

• CAN/CSA-C22.2 No. 60950 (Canada) and GB4943-95 (People's Republic of China)

• EN60950 (CENELEC; includes EU and EFTA)

• SS337 (Singapore; PSB approval), NOM-019-SCFI-1998 (Mexico), and UL 60950 3rd edition (United States)

Homologation

Platform dependent

Mean Time between Failure (MTBF)

System dependent

EMC

CISPR22, Class B

Emissions

EN55022, Class B

Emissions

CFR47, Part 15, Subpart B, Class B

Emissions

EN61000-3-2

Harmonics

EN61000-3-3

Flicker

CISPR24

Immunity

EN 55024

Immunity

EN50082-1

Immunity

EN61000-3-2

Harmonics

EN 61000-3-3

Flicker

EN 61000-4-2

Electrostatic discharge (ESD)

EN 61000-4-3

Radio frequency (RF) fields

EN 61000-4-4

EFT

EN 61000-4-5

Surge

EN 61000-4-6

Conducted RF

EN 6100-4-8

Power-frequency magnetic fields

EN 61000-4-11

Voltage dips, sags, and interruptions